Research – NplusT

NplusT has successfully completed the factory buy-off and shipped a customized TESTMESH TMA-100 system to imec, for the characterization and reliability evaluation of advanced 3D NAND test structures.

The solution is based on the TESTMESH TMA-100 platform combined with the TXU-NAND Extension Unit, developed to address the demanding electrical and connectivity requirements of complex 3D NAND test arrays.

Key capabilities:

32 bitlines and 32 wordlines, 8 banks with independently controlled top and bottom selectors, up to 8 source lines;
Measurement on both bitlines and source lines;
Fully analog stimulus and measurement, high-voltage operation up to 30 V, current sensing down to the nA range;
High-speed execution for endurance and reliability tests with very large numbers of program/erase/measure cycles, monitoring degradation continuously.

The modular TESTMESH architecture also allows the TXU-NAND Extension Unit to be positioned close to the probe station, minimizing critical signal paths and supporting signal integrity, while the main TMA-100 system can be located remotely.

Beyond the hardware, NplusT provides a library of NAND-specific test and characterization algorithms. Test flows and measurement sequences are fully programmable in Python and C++, providing researchers with the flexibility to implement and automate customized characterization methodologies. The system can also control automated probe stations, enabling complete wafer-level characterization and reliability test flows.

For this specific customer configuration, the complete equipment and software environment operates under Linux.

The shipment follows the purchase order announced earlier this year and marks the successful completion of the development, integration and factory acceptance phase of the project.

With the system now moving to imec, NplusT continues to expand the TESTMESH platform from emerging-memory characterization into advanced 3D NAND research, endurance testing and reliability evaluation.

TESTMESH TMA-100 and TXU NAND — TESTMESH TMA-100 and TXU-NAND

Only a few days to go before the 18th IEEE International Memory Workshop takes place in Leuven, Belgium, from May 10 to 13, 2026.

NplusT will be there with its booth, ready to connect with innovators, researchers, and industry leaders shaping the future of memory technologies.
Discover our advanced testing and characterization solutions for NVM, specifically designed for emerging paradigms such as neuromorphic architectures, in-memory computing (IMC), and AI-driven systems.

Visit our booth and see how we enable precise, scalable, and high-performance testing for next-generation memory devices
Book a meeting with our experts and explore tailored solutions for your applications

Since 2011, NplusT has presented the MOCCA (MOst Creative Customer Award) annually to recognize and celebrate the user team that demonstrates exceptional creativity in applying NplusT products to innovative and impactful projects. This award highlights the spirit of collaboration and innovation that drives technological progress.

MOCCA 2024 has been assigned to the IHP team, lead by Christian Wenger, Department Head, and including Andrea Baroni and Eduardo Perez, Scientists of the Material Research team, as first users of the TESTMESH TMC-100 configuration.

Tamas Kerekes, President and CEO of NplusT, shared his thoughts:

“Engaging with the IHP team to understand their unique requirements, we identified the significant market potential for a new TESTMESH configuration tailored to the specific characterization needs of neuromorphic computational arrays, built on cutting-edge non-volatile memory technologies. Together, our engineering teams conceptualized a solution that not only meets these demands but also positions us to deliver a groundbreaking characterization tool for this rapidly evolving market. I deeply value the shared commitment to innovation and the collaborative effort to design architectures that align seamlessly with the ever-changing landscape of technological advancements.”

Christian Wenger, Department Head, Material Research in IHP:

“The TESTMESH TMC-100 equipment from NplusT provides us the opportunity to investigate HfO2 based RRAM arrays in the 1T-1R configuration for Vector-Matrix-Multiplication application. The tailored set-up enables the programming the RRAM devices using complex algorithms as well as the interference process by addressing lines of the array. We are looking forward to present the first electrical results soon and to strengthen the collaboration between NplusT and IHP.”

IHP’s Andrea Baroni And NplusT’s Alessandro Feriani with TMC-100

In the past, MOCCA was assigned to:

2011 Macronix
2012 STMicroelectronics
2013 IHP
2014 Infineon
2015 Tower
2016 STMicroelectronics
2017 Microsemi
2018 GAMAX
2019 Infineon
2020 LETI
2021 TENAFE
2022 STMicroelectronics
2023 WEEBIT

NplusT has achieved a major milestone with the granting of its second patent, further strengthening its intellectual property portfolio in cutting-edge testing solutions for electronic devices. This latest patent safeguards the company’s fast, multi-range, low-leakage current sensing circuitry, a critical technology for precise and efficient device evaluation, already applied in specific TESTMESH configurations.

Building on this momentum, NplusT is also advancing its third patent, currently pending approval. This innovation introduces a structured test system architecture, designed to interface seamlessly with electronic memory devices, optimizing the testing of matrix-arranged memory cells—particularly for emerging neuromorphic memory technologies. Such technology is the core of the TESTMESH TMC-100 equipment.

“These achievements reaffirm our commitment to technological excellence and continuous innovation.” said Tamas Kerekes, President and CEO of NplusT. “They further establish our company as a leading provider of non-volatile memory testing solutions, enabling the next generation of advanced memory devices.”

With a growing portfolio of proprietary technologies, NplusT continues to push the boundaries of non-volatile memory testing, delivering solutions that enhance speed, accuracy, and reliability in the rapidly evolving semiconductor landscape.

A prestigious European research center has selected NplusT’s TESTMESH TMC-100 for the advanced characterization of neuromorphic computational arrays based on emerging non-volatile technology. The exceptional speed and precision of the TMC-100, operating at hundreds of times faster than competitors, was a key factor in their decision.

This new installation marks the continuation of over 10 years of collaboration, and we are thrilled to further strengthen our partnership.

NplusT’s technology was recently featured in a research publication and played a critical role in enabling precise data collection and testing. Using NanoCycler as core tool for acquiring real-device data during the entire NAND life cycle, Luo Zheng’s dissertation, titled “Research and Development of Efficient Testing Technology for Ultra-large Capacity 3D Flash Memory”, delves into enhancing the reliability and lifespan of 3D NAND flash memory.

Written under the guidance of Prof. Han Guojun at the Department of Electronic Information, Guangdong University of Technology, in Guangzhou, China, the research focuses on developing machine learning models to accurately predict flash memory lifespan. The work aims to optimize storage system performance by reducing the impact of noise on lifespan prediction accuracy.

The NplusT team extends their congratulations to Luo Zheng for earning the degree of Master of Electronic Information.

NplusT Ships Advanced 3D NAND Characterization System to imec

NplusT at IMW 2026

MOCCA 2024 awarded to IHP

NplusT Secures Second Patent, Advances Third Innovation

TESTMESH TMC-100 Installed at Leading European Research Center

NanoCycler Powers Research in 3D Flash Memory Lifespan Prediction: Luo Zheng Earns Master’s Degree at Guangdong University of Technology

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