Only a few days to go before the 18th IEEE International Memory Workshop takes place in Leuven, Belgium, from May 10 to 13, 2026.
NplusT will be there with its booth, ready to connect with innovators, researchers, and industry leaders shaping the future of memory technologies.
Discover our advanced testing and characterization solutions for NVM, specifically designed for emerging paradigms such as neuromorphic architectures, in-memory computing (IMC), and AI-driven systems.
Visit our booth and see how we enable precise, scalable, and high-performance testing for next-generation memory devices
Book a meeting with our experts and explore tailored solutions for your applications
Since 2011, NplusT has presented the MOCCA (MOst Creative Customer Award) annually to recognize and celebrate the user team that demonstrates exceptional creativity in applying NplusT products to innovative and impactful projects. This award highlights the spirit of collaboration and innovation that drives technological progress.
MOCCA 2024 has been assigned to the IHP team, lead by Christian Wenger, Department Head, and including Andrea Baroni and Eduardo Perez, Scientists of the Material Research team, as first users of the TESTMESH TMC-100 configuration.
Tamas Kerekes, President and CEO of NplusT, shared his thoughts:
“Engaging with the IHP team to understand their unique requirements, we identified the significant market potential for a new TESTMESH configuration tailored to the specific characterization needs of neuromorphic computational arrays, built on cutting-edge non-volatile memory technologies. Together, our engineering teams conceptualized a solution that not only meets these demands but also positions us to deliver a groundbreaking characterization tool for this rapidly evolving market. I deeply value the shared commitment to innovation and the collaborative effort to design architectures that align seamlessly with the ever-changing landscape of technological advancements.”
Christian Wenger, Department Head, Material Research in IHP:
“The TESTMESH TMC-100 equipment from NplusT provides us the opportunity to investigate HfO2 based RRAM arrays in the 1T-1R configuration for Vector-Matrix-Multiplication application. The tailored set-up enables the programming the RRAM devices using complex algorithms as well as the interference process by addressing lines of the array. We are looking forward to present the first electrical results soon and to strengthen the collaboration between NplusT and IHP.”
IHP’s Andrea Baroni with TMC-100IHP’s Andrea Baroni And NplusT’s Alessandro Feriani with TMC-100
NplusT has achieved a major milestone with the granting of its second patent, further strengthening its intellectual property portfolio in cutting-edge testing solutions for electronic devices. This latest patent safeguards the company’s fast, multi-range, low-leakage current sensing circuitry, a critical technology for precise and efficient device evaluation, already applied in specific TESTMESH configurations.
Building on this momentum, NplusT is also advancing its third patent, currently pending approval. This innovation introduces a structured test system architecture, designed to interface seamlessly with electronic memory devices, optimizing the testing of matrix-arranged memory cells—particularly for emerging neuromorphic memory technologies. Such technology is the core of the TESTMESH TMC-100 equipment.
“These achievements reaffirm our commitment to technological excellence and continuous innovation.” said Tamas Kerekes, President and CEO of NplusT. “They further establish our company as a leading provider of non-volatile memory testing solutions, enabling the next generation of advanced memory devices.”
With a growing portfolio of proprietary technologies, NplusT continues to push the boundaries of non-volatile memory testing, delivering solutions that enhance speed, accuracy, and reliability in the rapidly evolving semiconductor landscape.
A prestigious European research center has selected NplusT’s TESTMESH TMC-100 for the advanced characterization of neuromorphic computational arrays based on emerging non-volatile technology. The exceptional speed and precision of the TMC-100, operating at hundreds of times faster than competitors, was a key factor in their decision.
This new installation marks the continuation of over 10 years of collaboration, and we are thrilled to further strengthen our partnership.
NplusT’s technology was recently featured in a research publication and played a critical role in enabling precise data collection and testing. Using NanoCycler as core tool for acquiring real-device data during the entire NAND life cycle, Luo Zheng’s dissertation, titled “Research and Development of Efficient Testing Technology for Ultra-large Capacity 3D Flash Memory”, delves into enhancing the reliability and lifespan of 3D NAND flash memory.
Written under the guidance of Prof. Han Guojun at the Department of Electronic Information, Guangdong University of Technology, in Guangzhou, China, the research focuses on developing machine learning models to accurately predict flash memory lifespan. The work aims to optimize storage system performance by reducing the impact of noise on lifespan prediction accuracy.
The NplusT team extends their congratulations to Luo Zheng for earning the degree of Master of Electronic Information.
