NplusT was featured on the 68th issue of HiPEAC magazine with an article on the 2nd FTTE project POP-LEC, for the optimization of the power consumption of CPS/ IoT devices, developed in the SMART4ALL H2020 framework and currently in its advanced industrialization stage.
Tamás Kerekes, president and CEO of NplusT, explains how the the company teamed up with Hungarian design house PCB Design to build the equipment prototype.
The complete issue is available at this link.
Every year, NplusT assigns the MOCCA (MOst Creative Customer Award) to those users, whose innovative applications and solutions enhance the utilization and performance of NplusT products. The year 2020 MOCCA has been assigned to Niccolò Castellani, R&D Engineer at CEA-LETI, Grenoble, for developing a software platform for the automation of non-volatile memory test flow execution on NplusT’s test equipment.
Tamas Kerekes, President and CEO of NplusT:
“I am really happy to see the way how Niccolò and the LETI team approached their specific requirements. The software framework, which Niccolò has created on top of the execution environment of the tester, enables the easy development of characterization programs for a wide range of novel, emerging non-volatile memory technologies. We plan to continue supporting LETI, providing innovative test platforms which enable fast and accurate measurements, contributing to develop high-performance, low-power, reliable storage devices.”
Niccolo Castellani, R&D engineer at CEA-Leti:
“I started this project a couple of years ago, having already experienced test developing and data analysis for research and industrial requirements. I’ve been always convinced about the real need of versatility for the R&D of merging memories testing. Only NplusT was able to provide the right tools and the right support team to accomplish my objective: a hardware to user interface getting plug-and-play new designs and new algorithms in its environment. I’m willing to continue this great collaboration.”
Building on their successful memory testing technology, NplusT has extended this expertise to the design, validation and characterization of image sensor devices.
The array-organized analog cell structure of the image sensor is similar to non-volatile memory and lends itself to the reuse of the core NplusT memory testing technology that has been production-proven for decades.
Specific needs of data analysis to support image sensors has resulted in additional innovation with the extension of BarnieMAT, NplusT’s popular array data analysis tool, adding an additional library containing processing functions dedicated to image sensors.
The NplusT engineering team, in cooperation with FPGArt, implemented and tested with success a new technology, pushing up the communication speed between the tester and the device under test. The experimental solution, applied for a next generation NVM device, reaches 1.6GT/sec data transfer rate. Mastering this new technology, the application range of the RIFLE test system extends and covers the latest mass storage components, stil maintaining the cost advantage and faster time-to-result related to competitive solutions.
The already rich set of functions of RIFLE-M has been extended by the possibility of measuring access times of memory arrays at high accuracy. This new function, implemented as a dedicated FPGA module, generates programmable signal skew with a 1 nsec resolution. The feature is supported by an application specific calibration software in order to compensate the overall system skew including test board. In the same time, shmoo functionality covers the access time as well.
One of the key customers of RIFLE-M declared that the availability of this new function allows the execution of the entire design validation flow on RIFLE-M so other test platforms can be “switched off”.