characterization

NplusT is pleased to announce the delivery of a NanoCycler to a customer in the United States. The equipment will be deployed to characterize NAND memory devices, configured to support the specific requirements of radiation testing and aerospace qualification.

The order underscores NanoCycler’s proven capability to deliver highly accurate, package-level characterization data—covering aging, endurance, retention, timing, and power profiling—under the demanding conditions required by mission-critical aerospace systems. Its fully independent per-package test architecture allows engineers to tailor test flows precisely to radiation and environmental test protocols, making it a natural fit for space and defense-grade qualification work.

Tamas Kerekes, President and CEO of NplusT, comments: “The project is another important milestone of our activities for the aerospace industry, started with a project launched in 2025 with ESA, PCB Design and Thales, and now reaching its final stage. This new delivery confirms the relevance of our technology for radiation testing and aerospace-grade qualification, and reflects the growing international recognition of NanoCycler as a reference NAND characterization platform.”

We are pleased to announce a new release of the NanoCycler library, delivering significant performance improvements for NAND BER (Bit Error Rate) collection and datalog generation.

Over time, we identified that one of the main performance limitations of the Python library was the time required to calculate NAND page bit errors and generate the associated datalog. This overhead could have a noticeable impact on total execution time, particularly for complex test flows.

With WS version 4.3.3, NanoCycler now includes native, integrated datalog support, substantially accelerating failure collection and reducing overall execution time by more than 3×.

For example, a complete TLC block of approximately 2,000 pages, tested across all Read Retry entries, now takes approximately:

20 seconds → 6 seconds

This optimization applies broadly to operations that require NAND BER extraction and generation of test log reports.

The result is faster test execution, more efficient failure analysis, and improved productivity for NAND characterization and reliability testing.

NplusT has successfully delivered another TESTMESH TMA-100 characterization system to a leading semiconductor company developing advanced RRAM memristor technology, using it both for embedded storage and for analog in-memory computing (IMC) applications.
The delivery includes the first hardware and software extension based on the new TESTMESH Extension Unit architecture. The extension, named TXU-CROSSBAR, has been specifically developed to characterize analog vector-matrix multiplication (VMM) and, more generally, crossbar-structured arrays. TXU-CROSSBAR expands the capabilities of the TESTMESH platform while preserving full compatibility with the standard system, providing researchers with a flexible environment for evaluating increasingly complex emerging-memory architectures.
Analog IMC based on RRAM memristor arrays is one of the most promising approaches for accelerating artificial intelligence workloads with dramatically improved energy efficiency. At the same time, these devices introduce new characterization challenges, requiring highly flexible instrumentation capable of combining precise analog stimulus, synchronized measurements, programmable algorithms, and advanced software control. TXU-CROSSBAR has been designed specifically to address these requirements.

This delivery represents the third TESTMESH TMA-100 system supplied to the same customer. In parallel, NplusT has already received the purchase order for a fourth system, further confirming both the value of the TESTMESH platform and the confidence established through this long-term technical collaboration.
Beyond the equipment itself, this project reflects the close cooperation established between the engineering teams. Working together, they have translated challenging characterization requirements into a practical and scalable solution, demonstrating how a modular platform can evolve alongside the rapidly changing needs of emerging-memory research.
The TESTMESH Extension Unit represents an important milestone in the evolution of the TESTMESH family. It enables customer-specific capabilities to be integrated into a common platform without compromising maintainability or future evolution, allowing new application domains to be addressed while leveraging the same proven hardware and software infrastructure.
As research in emerging memories and analog computing continues to accelerate, NplusT remains committed to providing flexible characterization solutions that enable innovation and shorten the path from laboratory research to commercial products.
The repeat adoption of TESTMESH by the same customer demonstrates the scalability of the platform and the value of long-term engineering partnerships in bringing next-generation memory technologies from research to production.

Advanced characterization environment for PCM (Phase Change Memory) test arrays

Since 2011, NplusT has presented the MOCCA (MOst Creative Customer Award) annually to recognize and celebrate the user team that demonstrates outstanding creativity in applying NplusT products to innovative and impactful projects. The award reflects the shared commitment to exploration, collaboration, and technological advancement.
For 2025, the MOCCA Award has been granted to the STMicroelectronics, Global Technology R&D – PCM Excellence Center team, composed of Giulia Samanni (ePCM Process Architecture & Device Reliability Staff Engineer), Enrico Gomiero (ePCM Device Architecture & Design Principal Engineer) and Alessandro Motta (ePCM Characterization Staff Engineer), and managed by Roberto Annunziata, for the creation of an advanced characterization environment for PCM (Phase Change Memory) test arrays.
Through their innovative approach, the STMicroelectronics team has developed a solution, based on NplusT’s TESTMESH TMA-100 instrumentation platform, that greatly enhances the speed and efficiency of device characterization, opening new opportunities for deeper analysis and faster iteration in memory technology development. Their project exemplifies how close collaboration and creative application of NplusT tools can translate into tangible performance breakthroughs.
Tamas Kerekes, President and CEO of NplusT, commented:
“Working with the STMicroelectronics team was a perfect example of how shared technical curiosity and mutual trust can accelerate innovation. Their forward-thinking use of our NVM characterization tools to build a highly efficient PCM test environment not only demonstrates exceptional creativity but also sets a new benchmark for characterization speed. We are proud to see such a clear alignment between our vision and their execution.”
Roberto Annunziata, Global Technology R&D – PCM Excellence Center Director, STMicroelectronics:
“NplusT provided a perfect framework for an effective collaboration. Technical expertise of our partners and strong motivation to find solutions enabled working as a unique team, exploiting the wide field of competencies. Results jointly achieved are a value for the current projects and an example for future collaborations in different domains.”

The STMicroelectronics Global Technology R&D PCM Excellence Center team and NplusT's CTO Nicola Campanelli — The STMicroelectronics Global Technology R&D PCM Excellence Center team and NplusT’s CTO Nicola Campanelli

NplusT today announced two important upgrades to its NanoCycler HS24 product line, enhancing performance and extending applicability for NAND characterization.

New NanoCycler HS24 BGA154 Tester Unit (rev2)

The new version of the NanoCycler HS24 BGA154 tester unit introduces standby current measurement with approx. 1 µA resolution, enabling more precise power characterization. The updated unit maintains full mechanical and software compatibility with existing systems and will be available at the same price as the previous version. Orders are open now, with deliveries starting in 3–4 months.

Industrial Temperature Range Configuration

NplusT has created a specific version and qualified both the HS24 BGA152 and BGA154 tester units for the industrial temperature range, enabling reliable testing of SSD devices for automotive and industrial applications. Integration with a climatic chamber is required, and NplusT offers engineering support to ensure smooth implementation.

“Our mission is to help SSD makers understand the behavior of the most recent NAND devices, accelerate development and ensure product reliability under real-world conditions,” said Tamas Kerekes, President and CEO of NplusT. “With these upgrades, the NanoCycler platform is now even more versatile, addressing the demanding requirements of industrial and automotive markets.”

For more information, please contact:

Davide Zini
Sales Director
davide.zini@n-plus-t.com

or one of our sales partners.

Join us at the International Memory Workshop 2025 to discover our solutions designed for rapid and accurate characterization of emerging non-volatile memory technologies, facilitate faster time-to-market and enhanced engineering productivity.

📅 [May 18th-21st 2025] | 📍 [Monterey, CA, USA]
🔗 [IEEE IMW 2025]

NplusT’s technology was recently featured in a research publication and played a critical role in enabling precise data collection and testing. Using NanoCycler as core tool for acquiring real-device data during the entire NAND life cycle, Luo Zheng’s dissertation, titled “Research and Development of Efficient Testing Technology for Ultra-large Capacity 3D Flash Memory”, delves into enhancing the reliability and lifespan of 3D NAND flash memory.

Written under the guidance of Prof. Han Guojun at the Department of Electronic Information, Guangdong University of Technology, in Guangzhou, China, the research focuses on developing machine learning models to accurately predict flash memory lifespan. The work aims to optimize storage system performance by reducing the impact of noise on lifespan prediction accuracy.

The NplusT team extends their congratulations to Luo Zheng for earning the degree of Master of Electronic Information.

A leading European semiconductor manufacturer has chosen NplusT’s TESTMESH TMA-100 for the characterization of new emerging non-volatile technology devices. The decision was based on the significant speed advantage that TMA-100 offers, being several hundred times faster than competitive solutions.

NplusT – as gold sponsor of the event – will exhibit the TESTMESH non-volatile memory test system, aiming to accelerate the bring-up of novel technologies for data storage and in-memory neuromorphic computing.

Technology researchers and product developers benefit from a compact, all-in-one instrument, embedding all resources necessary for the characterization. They can focus on the analysis rather than spending time and effort for the integration of a complex test bench. TESTMESH’s speed-optimized architecture and the engineering-oriented software accelerates their process to obtain reliable results.

Looking forward to meet you, see you in Seoul!

As a tradition spanning more than a decade, NplusT assigned the MOCCA award also in 2023, honoring the user of NplusT products and services demonstrating the highest creativity, imagination, and dedication.

This year, the award was granted to the team of Weebit Nano, a provider of ReRAM non-volatile memory (NVM) technology, for their introduction of the TESTMESH TMA-100 NVM characterization equipment in their workflow. The Weebit team includes: Ori Livne, Director of Testing; Alessandro Bricalli PhD, R&D Engineer; Giuseppe Piccolboni PhD, R&D Engineer; and Matan Guttman, Test Engineer.

Tamás Kerekes, President and CEO of NplusT:

I have been following Weebit Nano since their very early days and I was impressed by how quickly the team was able to bring up a very new, extremely challenging technology. I am happy to support the company on their path to success. Weebit Nano is among the first users of our latest non-volatile memory characterization equipment, TESTMESH TMA-100, and certainly the first to apply it across multiple stages of technology development, from basic test devices to complex modules with embedded micro and digital interface. I am looking forward to continuing being part of Weebit Nano’s technology evaluation process.

Ilan Sever, VP of R&D, of Weebit Nano:

When developing a new memory technology like Weebit ReRAM, selecting the best testing and characterization solutions is a priority. We are delighted to partner with the team at NplusT, making its TESTMESH TMA-100 a key part of our flow. Together we designed the software, load boards and probe cards, going deep into every technical aspect.
At Weebit Nano, our products often have distinct working methodologies, and the TMA-100 easily accommodates these different procedures. This includes for example the ability to easily collaborate on the same platform with our R&D partner CEA-Leti.
Across our developments, the TMA-100 has saved us a lot of time and effort through product flexibility, the ability to reuse past developments, and the close support we receive from NplusT.

Weebit’s Ori Livne (left) and Matan Guttman (right) with the TESTMESH TMA-100

NplusT Delivers NanoCycler to U.S. Aerospace Customer

New NanoCycler Library Release Improves NAND Failure Collection Performance

Enabling the Next Generation of Analog In-Memory Computing with TESTMESH

MOCCA 2025 awarded to STMicroelectronics

NplusT Announces Major Upgrades to NanoCycler Product Line for NAND Characterization

NplusT at IMW 2025

NanoCycler Powers Research in 3D Flash Memory Lifespan Prediction: Luo Zheng Earns Master’s Degree at Guangdong University of Technology

New Purchase Order for TESTMESH TMA-100

Visit us at the International Memory Workshop – Seoul, 12-15 May 2024!

MOCCA 2023 awarded to Weebit Nano

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