NplusT is pleased to announce the public release of TEE.Sim.RRAM, a free simulation workspace for the TESTMESH platform that enables engineers and researchers to develop, validate, and explore Resistive RAM (RRAM) characterization flows without requiring physical hardware.

Designed for both newcomers and experienced users, TEE.Sim.RRAM provides an accessible environment for learning the TESTMESH ecosystem, prototyping measurement sequences, and evaluating test methodologies long before silicon or laboratory equipment become available.

With TEE.Sim.RRAM, NplusT continues its commitment to making advanced non-volatile memory characterization more accessible, enabling engineers to explore innovative test methodologies with lower entry barriers and faster development cycles.

What is TEE.Sim.RRAM?

TEE.Sim.RRAM is a ready-to-use workspace built on the TEE (TESTMESH Execution Engine) framework. It simulates a 32 × 32 (1024-cell) RRAM array using a physics-based software model that reproduces the key characteristics of real devices, including voltage-driven conductance switching, device-to-device parameter variation, and realistic measurement noise.

The simulator also preserves the state of every memory cell across sessions, allowing users to perform long-term characterization studies such as endurance and progressive degradation experiments.

Why it matters

Developing characterization software typically depends on access to specialized hardware, which is often limited during the early stages of a project. TEE.Sim.RRAM removes this dependency by providing a realistic virtual laboratory that runs on any Windows PC with TESTMESH and BarnieMAT installed.

This allows development teams to design and debug measurement algorithms, evaluate new characterization concepts, and train engineers in parallel with hardware development, significantly shortening the path from concept to experimental validation.

What’s included

TEE.Sim.RRAM is delivered with a comprehensive collection of ready-to-run Python examples covering the most common RRAM characterization procedures, including:

• SET, RESET and READ operations
• Endurance cycling
• Incremental pulse programming experiments
• Current-voltage (I-V) sweeps

Measurement results are stored in CSV format and can be imported directly into BarnieMAT for interactive visualization and advanced data analysis.

Get Started

TEE.Sim.RRAM is available today through the NplusT/TestMesh GitHub repository.

Installation requires the TESTMESH User Interface and BarnieMAT, both available from the NplusT partner portal. License keys are provided free of charge upon request by contacting info@n-plus-t.com.