NanoCycler HS ONE STOP Solution for NAND Characterization

Supports endurance and functional testing of NAND devices by providing C++ and Python API with full ONFI command set and with customizable signal sequences.
NanoCycler HS Tester Unit
Clock
Exercises and stresses at-speed - up to 1.6 GT/sec – the devices under test faithfully replicating the use conditions of the application.
Provides high-accuracy - 10 mV precision - programmable power supplies for accurate voltage margins analysis.
BER VCC
ICC erase measure
Captures the power consumption for each supply at 50 nsec sampling rate with 1 mA resolution. Flash operations power consumption data are processed in real time to provide high resolution current consumption traces, and key metrics (peak, average, distributions) over long period of time.
Characterizes the flash interface timing with 1 nsec I/O edge placement and 20 nsec flash response time acquisition.
Eye diagram
NanoCycler rack 48 tester units
Has a scalable and expandable architecture, from 1 to 48 test sites, to optimize cost and long term investment.
Allows full independence of the test sites where each device under test can run at individual temperature, timing, voltage levels, with different test programs.
NanoCycler Sysyem architecture
BarnieMAT Read
Integrates the data analysis environment to post-process and present the results to accelerate time to product.

Highest quality characterization results at the lowest cost and effort – NanoCycler HS represents a future-safe investment to design high-performance reliable mass storage devices.

NanoCycler Cost-Effective NAND Characterization

Supports endurance and functional testing of NAND devices by providing C++ and Python API with full ONFI command set and with customizable signal sequences.
NanoCycler HS Tester Unit
Clock
Exercises and stresses at high speed - up to 800 MT/sec – the devices under test faithfully replicating the use conditions of the application.
Has a scalable and expandable architecture, from 1 to 48 test sites, to optimize cost and long term investment.
NanoCycler rack 48 tester units
NanoCycler Sysyem architecture
Allows full independence of the test sites where each device under test can run at individual temperature, timing, voltage levels, with different test programs.
Integrates the data analysis environment to post-process and present the results to accelerate time to product.
BarnieMAT Read

Characterization Services

Fully Integrated SSD-NAND Characterization Flow

Rifle-SE
  • Understand the NAND
    • Endurance, retention, degradation characteristics
    • Read, write, program times and distributions
    • Suspend and BER impact
  • Understand LDPC ECC
    • Hard decode using soft values
    • Choice of LLR and impact on performance
    • Frequency of use of soft LDPC
  • Set clear SSD Requirement
    • Endurance
    • Retention tradeoffs
    • Performance, latency, QoS, power targets
    • Usage models